/*
* This file was generated automatically by gen-mterp.py for 'armv5te'.
*
* --> DO NOT EDIT <--
*/
/* File: c/header.c */
/*
* Copyright (C) 2008 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/* common includes */
#include "Dalvik.h"
#include "interp/InterpDefs.h"
#include "mterp/Mterp.h"
#include <math.h> // needed for fmod, fmodf
/*
* Configuration defines. These affect the C implementations, i.e. the
* portable interpreter(s) and C stubs.
*
* Some defines are controlled by the Makefile, e.g.:
* WITH_PROFILER
* WITH_DEBUGGER
* WITH_INSTR_CHECKS
* WITH_TRACKREF_CHECKS
* EASY_GDB
* NDEBUG
*
* If THREADED_INTERP is not defined, we use a classic "while true / switch"
* interpreter. If it is defined, then the tail end of each instruction
* handler fetches the next instruction and jumps directly to the handler.
* This increases the size of the "Std" interpreter by about 10%, but
* provides a speedup of about the same magnitude.
*
* There's a "hybrid" approach that uses a goto table instead of a switch
* statement, avoiding the "is the opcode in range" tests required for switch.
* The performance is close to the threaded version, and without the 10%
* size increase, but the benchmark results are off enough that it's not
* worth adding as a third option.
*/
#define THREADED_INTERP /* threaded vs. while-loop interpreter */
#ifdef WITH_INSTR_CHECKS /* instruction-level paranoia */
# define CHECK_BRANCH_OFFSETS
# define CHECK_REGISTER_INDICES
#endif
/*
* ARM EABI requires 64-bit alignment for access to 64-bit data types. We
* can't just use pointers to copy 64-bit values out of our interpreted
* register set, because gcc will generate ldrd/strd.
*
* The __UNION version copies data in and out of a union. The __MEMCPY
* version uses a memcpy() call to do the transfer; gcc is smart enough to
* not actually call memcpy(). The __UNION version is very bad on ARM;
* it only uses one more instruction than __MEMCPY, but for some reason
* gcc thinks it needs separate storage for every instance of the union.
* On top of that, it feels the need to zero them out at the start of the
* method. Net result is we zero out ~700 bytes of stack space at the top
* of the interpreter using ARM STM instructions.
*/
#if defined(__ARM_EABI__)
//# define NO_UNALIGN_64__UNION
# define NO_UNALIGN_64__MEMCPY
#endif
//#define LOG_INSTR /* verbose debugging */
/* set and adjust ANDROID_LOG_TAGS='*:i jdwp:i dalvikvm:i dalvikvmi:i' */
/*
* Keep a tally of accesses to fields. Currently only works if full DEX
* optimization is disabled.
*/
#ifdef PROFILE_FIELD_ACCESS
# define UPDATE_FIELD_GET(_field) { (_field)->gets++; }
# define UPDATE_FIELD_PUT(_field) { (_field)->puts++; }
#else
# define UPDATE_FIELD_GET(_field) ((void)0)
# define UPDATE_FIELD_PUT(_field) ((void)0)
#endif
/*
* Adjust the program counter. "_offset" is a signed int, in 16-bit units.
*
* Assumes the existence of "const u2* pc" and "const u2* curMethod->insns".
*
* We don't advance the program counter until we finish an instruction or
* branch, because we do want to have to unroll the PC if there's an
* exception.
*/
#ifdef CHECK_BRANCH_OFFSETS
# define ADJUST_PC(_offset) do { \
int myoff = _offset; /* deref only once */ \
if (pc + myoff < curMethod->insns || \
pc + myoff >= curMethod->insns + dvmGetMethodInsnsSize(curMethod)) \
{ \
char* desc; \
desc = dexProtoCopyMethodDescriptor(&curMethod->prototype); \
LOGE("Invalid branch %d at 0x%04x in %s.%s %s\n", \
myoff, (int) (pc - curMethod->insns), \
curMethod->clazz->descriptor, curMethod->name, desc); \
free(desc); \
dvmAbort(); \
} \
pc += myoff; \
} while (false)
#else
# define ADJUST_PC(_offset) (pc += _offset)
#endif
/*
* If enabled, log instructions as we execute them.
*/
#ifdef LOG_INSTR
# define ILOGD(...) ILOG(LOG_DEBUG, __VA_ARGS__)
# define ILOGV(...) ILOG(LOG_VERBOSE, __VA_ARGS__)
# define ILOG(_level, ...) do { \
char debugStrBuf[128]; \
snprintf(debugStrBuf, sizeof(debugStrBuf), __VA_ARGS__); \
if (curMethod != NULL) \
LOG(_level, LOG_TAG"i", "%-2d|%04x%s\n", \
self->threadId, (int)(pc - curMethod->insns), debugStrBuf); \
else \
LOG(_level, LOG_TAG"i", "%-2d|####%s\n", \
self->threadId, debugStrBuf); \
} while(false)
void dvmDumpRegs(const Method* method, const u4* framePtr, bool inOnly);
# define DUMP_REGS(_meth, _frame, _inOnly) dvmDumpRegs(_meth, _frame, _inOnly)
static const char kSpacing[] = " ";
#else
# define ILOGD(...) ((void)0)
# define ILOGV(...) ((void)0)
# define DUMP_REGS(_meth, _frame, _inOnly) ((void)0)
#endif
/* get a long from an array of u4 */
static inline s8 getLongFromArray(const u4* ptr, int idx)
{
#if defined(NO_UNALIGN_64__UNION)
union { s8 ll; u4 parts[2]; } conv;
ptr += idx;
conv.parts[0] = ptr[0];
conv.parts[1] = ptr[1];
return conv.ll;
#elif defined(NO_UNALIGN_64__MEMCPY)
s8 val;
memcpy(&val, &ptr[idx], 8);
return val;
#else
return *((s8*) &ptr[idx]);
#endif
}
/* store a long into an array of u4 */
static inline void putLongToArray(u4* ptr, int idx, s8 val)
{
#if defined(NO_UNALIGN_64__UNION)
union { s8 ll; u4 parts[2]; } conv;
ptr += idx;
conv.ll = val;
ptr[0] = conv.parts[0];
ptr[1] = conv.parts[1];
#elif defined(NO_UNALIGN_64__MEMCPY)
memcpy(&ptr[idx], &val, 8);
#else
*((s8*) &ptr[idx]) = val;
#endif
}
/* get a double from an array of u4 */
static inline double getDoubleFromArray(const u4* ptr, int idx)
{
#if defined(NO_UNALIGN_64__UNION)
union { double d; u4 parts[2]; } conv;
ptr += idx;
conv.parts[0] = ptr[0];
conv.parts[1] = ptr[1];
return conv.d;
#elif defined(NO_UNALIGN_64__MEMCPY)
double dval;
memcpy(&dval, &ptr[idx], 8);
return dval;
#else
return *((double*) &ptr[idx]);
#endif
}
/* store a double into an array of u4 */
static inline void putDoubleToArray(u4* ptr, int idx, double dval)
{
#if defined(NO_UNALIGN_64__UNION)
union { double d; u4 parts[2]; } conv;
ptr += idx;
conv.d = dval;
ptr[0] = conv.parts[0];
ptr[1] = conv.parts[1];
#elif defined(NO_UNALIGN_64__MEMCPY)
memcpy(&ptr[idx], &dval, 8);
#else
*((double*) &ptr[idx]) = dval;
#endif
}
/*
* If enabled, validate the register number on every access. Otherwise,
* just do an array access.
*
* Assumes the existence of "u4* fp".
*
* "_idx" may be referenced more than once.
*/
#ifdef CHECK_REGISTER_INDICES
# define GET_REGISTER(_idx) \
( (_idx) < curMethod->registersSize ? \
(fp[(_idx)]) : (assert(!"bad reg"),1969) )
# define SET_REGISTER(_idx, _val) \
( (_idx) < curMethod->registersSize ? \
(fp[(_idx)] = (u4)(_val)) : (assert(!"bad reg"),1969) )
# define GET_REGISTER_AS_OBJECT(_idx) ((Object *)GET_REGISTER(_idx))
# define SET_REGISTER_AS_OBJECT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
# define GET_REGISTER_INT(_idx) ((s4) GET_REGISTER(_idx))
# define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
# define GET_REGISTER_WIDE(_idx) \
( (_idx) < curMethod->registersSize-1 ? \
getLongFromArray(fp, (_idx)) : (assert(!"bad reg"),1969) )
# define SET_REGISTER_WIDE(_idx, _val) \
( (_idx) < curMethod->registersSize-1 ? \
putLongToArray(fp, (_idx), (_val)) : (assert(!"bad reg"),1969) )
# define GET_REGISTER_FLOAT(_idx) \
( (_idx) < curMethod->registersSize ? \
(*((float*) &fp[(_idx)])) : (assert(!"bad reg"),1969.0f) )
# define SET_REGISTER_FLOAT(_idx, _val) \
( (_idx) < curMethod->registersSize ? \
(*((float*) &fp[(_idx)]) = (_val)) : (assert(!"bad reg"),1969.0f) )
# define GET_REGISTER_DOUBLE(_idx) \
( (_idx) < curMethod->registersSize-1 ? \
getDoubleFromArray(fp, (_idx)) : (assert(!"bad reg"),1969.0) )
# define SET_REGISTER_DOUBLE(_idx, _val) \
( (_idx) < curMethod->registersSize-1 ? \
putDoubleToArray(fp, (_idx), (_val)) : (assert(!"bad reg"),1969.0) )
#else
# define GET_REGISTER(_idx) (fp[(_idx)])
# define SET_REGISTER(_idx, _val) (fp[(_idx)] = (_val))
# define GET_REGISTER_AS_OBJECT(_idx) ((Object*) fp[(_idx)])
# define SET_REGISTER_AS_OBJECT(_idx, _val) (fp[(_idx)] = (u4)(_val))
# define GET_REGISTER_INT(_idx) ((s4)GET_REGISTER(_idx))
# define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
# define GET_REGISTER_WIDE(_idx) getLongFromArray(fp, (_idx))
# define SET_REGISTER_WIDE(_idx, _val) putLongToArray(fp, (_idx), (_val))
# define GET_REGISTER_FLOAT(_idx) (*((float*) &fp[(_idx)]))
# define SET_REGISTER_FLOAT(_idx, _val) (*((float*) &fp[(_idx)]) = (_val))
# define GET_REGISTER_DOUBLE(_idx) getDoubleFromArray(fp, (_idx))
# define SET_REGISTER_DOUBLE(_idx, _val) putDoubleToArray(fp, (_idx), (_val))
#endif
/*
* Get 16 bits from the specified offset of the program counter. We always
* want to load 16 bits at a time from the instruction stream -- it's more
* efficient than 8 and won't have the alignment problems that 32 might.
*
* Assumes existence of "const u2* pc".
*/
#define FETCH(_offset) (pc[(_offset)])
/*
* Extract instruction byte from 16-bit fetch (_inst is a u2).
*/
#define INST_INST(_inst) ((_inst) & 0xff)
/*
* Extract the "vA, vB" 4-bit registers from the instruction word (_inst is u2).
*/
#define INST_A(_inst) (((_inst) >> 8) & 0x0f)
#define INST_B(_inst) ((_inst) >> 12)
/*
* Get the 8-bit "vAA" 8-bit register index from the instruction word.
* (_inst is u2)
*/
#define INST_AA(_inst) ((_inst) >> 8)
/*
* The current PC must be available to Throwable constructors, e.g.
* those created by dvmThrowException(), so that the exception stack
* trace can be generated correctly. If we don't do this, the offset
* within the current method won't be shown correctly. See the notes
* in Exception.c.
*
* Assumes existence of "u4* fp" and "const u2* pc".
*/
#define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc)
/*
* Determine if we need to switch to a different interpreter. "_current"
* is either INTERP_STD or INTERP_DBG. It should be fixed for a given
* interpreter generation file, which should remove the outer conditional
* from the following.
*
* If we're building without debug and profiling support, we never switch.
*/
#if defined(WITH_PROFILER) || defined(WITH_DEBUGGER)
# define NEED_INTERP_SWITCH(_current) ( \
(_current == INTERP_STD) ? \
dvmDebuggerOrProfilerActive() : !dvmDebuggerOrProfilerActive() )
#else
# define NEED_INTERP_SWITCH(_current) (false)
#endif
/*
* Look up an interface on a class using the cache.
*/
INLINE Method* dvmFindInterfaceMethodInCache(ClassObject* thisClass,
u4 methodIdx, const Method* method, DvmDex* methodClassDex)
{
#define ATOMIC_CACHE_CALC \
dvmInterpFindInterfaceMethod(thisClass, methodIdx, method, methodClassDex)
return (Method*) ATOMIC_CACHE_LOOKUP(methodClassDex->pInterfaceCache,
DEX_INTERFACE_CACHE_SIZE, thisClass, methodIdx);
#undef ATOMIC_CACHE_CALC
}
/*
* Check to see if "obj" is NULL. If so, throw an exception. Assumes the
* pc has already been exported to the stack.
*
* Perform additional checks on debug builds.
*
* Use this to check for NULL when the instruction handler calls into
* something that could throw an exception (so we have already called
* EXPORT_PC at the top).
*/
static inline bool checkForNull(Object* obj)
{
if (obj == NULL) {
dvmThrowException("Ljava/lang/NullPointerException;", NULL);
return false;
}
#ifdef WITH_EXTRA_OBJECT_VALIDATION
if (!dvmIsValidObject(obj)) {
LOGE("Invalid object %p\n", obj);
dvmAbort();
}
#endif
#ifndef NDEBUG
if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) {
/* probable heap corruption */
LOGE("Invalid object class %p (in %p)\n", obj->clazz, obj);
dvmAbort();
}
#endif
return true;
}
/*
* Check to see if "obj" is NULL. If so, export the PC into the stack
* frame and throw an exception.
*
* Perform additional checks on debug builds.
*
* Use this to check for NULL when the instruction handler doesn't do
* anything else that can throw an exception.
*/
static inline bool checkForNullExportPC(Object* obj, u4* fp, const u2* pc)
{
if (obj == NULL) {
EXPORT_PC();
dvmThrowException("Ljava/lang/NullPointerException;", NULL);
return false;
}
#ifdef WITH_EXTRA_OBJECT_VALIDATION
if (!dvmIsValidObject(obj)) {
LOGE("Invalid object %p\n", obj);
dvmAbort();
}
#endif
#ifndef NDEBUG
if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) {
/* probable heap corruption */
LOGE("Invalid object class %p (in %p)\n", obj->clazz, obj);
dvmAbort();
}
#endif
return true;
}
/* File: cstubs/stubdefs.c */
/* this is a standard (no debug support) interpreter */
#define INTERP_TYPE INTERP_STD
#define CHECK_DEBUG_AND_PROF() ((void)0)
# define CHECK_TRACKED_REFS() ((void)0)
/*
* In the C mterp stubs, "goto" is a function call followed immediately
* by a return.
*/
#define GOTO_TARGET_DECL(_target, ...) \
void dvmMterp_##_target(MterpGlue* glue, ## __VA_ARGS__);
#define GOTO_TARGET(_target, ...) \
void dvmMterp_##_target(MterpGlue* glue, ## __VA_ARGS__) { \
u2 ref, vsrc1, vsrc2, vdst; \
u2 inst = FETCH(0); \
const Method* methodToCall; \
StackSaveArea* debugSaveArea;
#define GOTO_TARGET_END }
/*
* Redefine what used to be local variable accesses into MterpGlue struct
* references. (These are undefined down in "footer.c".)
*/
#define retval glue->retval
#define pc glue->pc
#define fp glue->fp
#define curMethod glue->method
#define methodClassDex glue->methodClassDex
#define self glue->self
#define debugTrackedRefStart glue->debugTrackedRefStart
/* ugh */
#define STUB_HACK(x) x
/*
* Opcode handler framing macros. Here, each opcode is a separate function
* that takes a "glue" argument and returns void. We can't declare
* these "static" because they may be called from an assembly stub.
*/
#define HANDLE_OPCODE(_op) \
void dvmMterp_##_op(MterpGlue* glue) { \
u2 ref, vsrc1, vsrc2, vdst; \
u2 inst = FETCH(0);
#define OP_END }
/*
* Like the "portable" FINISH, but don't reload "inst", and return to caller
* when done.
*/
#define FINISH(_offset) { \
ADJUST_PC(_offset); \
CHECK_DEBUG_AND_PROF(); \
CHECK_TRACKED_REFS(); \
return; \
}
/*
* The "goto label" statements turn into function calls followed by
* return statements. Some of the functions take arguments, which in the
* portable interpreter are handled by assigning values to globals.
*/
#define GOTO_exceptionThrown() \
do { \
dvmMterp_exceptionThrown(glue); \
return; \
} while(false)
#define GOTO_returnFromMethod() \
do { \
dvmMterp_returnFromMethod(glue); \
return; \
} while(false)
#define GOTO_invoke(_target, _methodCallRange) \
do { \
dvmMterp_##_target(glue, _methodCallRange); \
return; \
} while(false)
#define GOTO_invokeMethod(_methodCallRange, _methodToCall, _vsrc1, _vdst) \
do { \
dvmMterp_invokeMethod(glue, _methodCallRange, _methodToCall, \
_vsrc1, _vdst); \
return; \
} while(false)
/*
* As a special case, "goto bail" turns into a longjmp. Use "bail_switch"
* if we need to switch to the other interpreter upon our return.
*/
#define GOTO_bail() \
dvmMterpStdBail(glue, false);
#define GOTO_bail_switch() \
dvmMterpStdBail(glue, true);
/*
* Periodically check for thread suspension.
*
* While we're at it, see if a debugger has attached or the profiler has
* started. If so, switch to a different "goto" table.
*/
#define PERIODIC_CHECKS(_entryPoint, _pcadj) { \
dvmCheckSuspendQuick(self); \
if (NEED_INTERP_SWITCH(INTERP_TYPE)) { \
ADJUST_PC(_pcadj); \
glue->entryPoint = _entryPoint; \
LOGVV("threadid=%d: switch to STD ep=%d adj=%d\n", \
glue->self->threadId, (_entryPoint), (_pcadj)); \
GOTO_bail_switch(); \
} \
}
/* File: c/opcommon.c */
/* forward declarations of goto targets */
GOTO_TARGET_DECL(filledNewArray, bool methodCallRange);
GOTO_TARGET_DECL(invokeVirtual, bool methodCallRange);
GOTO_TARGET_DECL(invokeSuper, bool methodCallRange);
GOTO_TARGET_DECL(invokeInterface, bool methodCallRange);
GOTO_TARGET_DECL(invokeDirect, bool methodCallRange);
GOTO_TARGET_DECL(invokeStatic, bool methodCallRange);
GOTO_TARGET_DECL(invokeVirtualQuick, bool methodCallRange);
GOTO_TARGET_DECL(invokeSuperQuick, bool methodCallRange);
GOTO_TARGET_DECL(invokeMethod, bool methodCallRange, const Method* methodToCall,
u2 count, u2 regs);
GOTO_TARGET_DECL(returnFromMethod);
GOTO_TARGET_DECL(exceptionThrown);
/*
* ===========================================================================
*
* What follows are opcode definitions shared between multiple opcodes with
* minor substitutions handled by the C pre-processor. These should probably
* use the mterp substitution mechanism instead, with the code here moved
* into common fragment files (like the asm "binop.S"), although it's hard
* to give up the C preprocessor in favor of the much simpler text subst.
*
* ===========================================================================
*/
#define HANDLE_NUMCONV(_opcode, _opname, _fromtype, _totype) \
HANDLE_OPCODE(_opcode /*vA, vB*/) \
vdst = INST_A(inst); \
vsrc1 = INST_B(inst); \
ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
SET_REGISTER##_totype(vdst, \
GET_REGISTER##_fromtype(vsrc1)); \
FINISH(1);
#define HANDLE_FLOAT_TO_INT(_opcode, _opname, _fromvtype, _fromrtype, \
_tovtype, _tortype) \
HANDLE_OPCODE(_opcode /*vA, vB*/) \
{ \
/* spec defines specific handling for +/- inf and NaN values */ \
_fromvtype val; \
_tovtype intMin, intMax, result; \
vdst = INST_A(inst); \
vsrc1 = INST_B(inst); \
ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
val = GET_REGISTER##_fromrtype(vsrc1); \
intMin = (_tovtype) 1 << (sizeof(_tovtype) * 8 -1); \
intMax = ~intMin; \
result = (_tovtype) val; \
if (val >= intMax) /* +inf */ \
result = intMax; \
else if (val <= intMin) /* -inf */ \
result = intMin; \
else if (val != val) /* NaN */ \
result = 0; \
else \
result = (_tovtype) val; \
SET_REGISTER##_tortype(vdst, result); \
} \
FINISH(1);
#define HANDLE_INT_TO_SMALL(_opcode, _opname, _type) \
HANDLE_OPCODE(_opcode /*vA, vB*/) \
vdst = INST_A(inst); \
vsrc1 = INST_B(inst); \
ILOGV("|int-to-%s v%d,v%d", (_opname), vdst, vsrc1); \
SET_REGISTER(vdst, (_type) GET_REGISTER(vsrc1)); \
FINISH(1);
/* NOTE: the comparison result is always a signed 4-byte integer */
#define HANDLE_OP_CMPX(_opcode, _opname, _varType, _type, _nanVal) \
HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
{ \
int result; \
u2 regs; \
_varType val1, val2; \
vdst = INST_AA(inst); \
regs = FETCH(1); \
vsrc1 = regs & 0xff; \
vsrc2 = regs >> 8; \
ILOGV("|cmp%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
val1 = GET_REGISTER##_type(vsrc1); \
val2 = GET_REGISTER##_type(vsrc2); \
if (val1 == val2) \
result = 0; \
else if (val1 < val2) \
result = -1; \
else if (val1 > val2) \
result = 1; \
else \
result = (_nanVal); \
ILOGV("+ result=%d\n", result); \
SET_REGISTER(vdst, result); \
} \
FINISH(2);
#define HANDLE_OP_IF_XX(_opcode, _opname, _cmp) \
HANDLE_OPCODE(_opcode /*vA, vB, +CCCC*/) \
vsrc1 = INST_A(inst); \
vsrc2 = INST_B(inst); \
if ((s4) GET_REGISTER(vsrc1) _cmp (s4) GET_REGISTER(vsrc2)) { \
int branchOffset = (s2)FETCH(1); /* sign-extended */ \
ILOGV("|if-%s v%d,v%d,+0x%04x", (_opname), vsrc1, vsrc2, \
branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \
FINISH(2); \
}
#define HANDLE_OP_IF_XXZ(_opcode, _opname, _cmp) \
HANDLE_OPCODE(_opcode /*vAA, +BBBB*/) \
vsrc1 = INST_AA(inst); \
if ((s4) GET_REGISTER(vsrc1) _cmp 0) { \
int branchOffset = (s2)FETCH(1); /* sign-extended */ \
ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,-", (_opname), vsrc1); \
FINISH(2); \
}
#define HANDLE_UNOP(_opcode, _opname, _pfx, _sfx, _type) \
HANDLE_OPCODE(_opcode /*vA, vB*/) \
vdst = INST_A(inst); \
vsrc1 = INST_B(inst); \
ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
SET_REGISTER##_type(vdst, _pfx GET_REGISTER##_type(vsrc1) _sfx); \
FINISH(1);
#define HANDLE_OP_X_INT(_opcode, _opname, _op, _chkdiv) \
HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
{ \
u2 srcRegs; \
vdst = INST_AA(inst); \
srcRegs = FETCH(1); \
vsrc1 = srcRegs & 0xff; \
vsrc2 = srcRegs >> 8; \
ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \
if (_chkdiv != 0) { \
s4 firstVal, secondVal, result; \
firstVal = GET_REGISTER(vsrc1); \
secondVal = GET_REGISTER(vsrc2); \
if (secondVal == 0) { \
EXPORT_PC(); \
dvmThrowException("Ljava/lang/ArithmeticException;", \
"divide by zero"); \
GOTO_exceptionThrown(); \
} \
if ((u4)firstVal == 0x80000000 && secondVal == -1) { \
if (_chkdiv == 1) \
result = firstVal; /* division */ \
else \
result = 0; /* remainder */ \
} else { \
result = firstVal _op secondVal; \
} \
SET_REGISTER(vdst, result); \
} else { \
/* non-div/rem case */ \
SET_REGISTER(vdst, \
(s4) GET_REGISTER(vsrc1) _op (s4) GET_REGISTER(vsrc2)); \
} \
} \
FINISH(2);
#define HANDLE_OP_SHX_INT(_opcode, _opname, _cast, _op) \
HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
{ \
u2 srcRegs; \
vdst = INST_AA(inst); \
srcRegs = FETCH(1); \
vsrc1 = srcRegs & 0xff; \
vsrc2 = srcRegs >> 8; \
ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \
SET_REGISTER(vdst, \
_cast GET_REGISTER(vsrc1) _op (GET_REGISTER(vsrc2) & 0x1f)); \
} \
FINISH(2);
#define HANDLE_OP_X_INT_LIT16(_opcode, _opname, _op, _chkdiv) \
HANDLE_OPCODE(_opcode /*vA, vB, #+CCCC*/) \
vdst = INST_A(inst); \
vsrc1 = INST_B(inst); \
vsrc2 = FETCH(1); \
ILOGV("|%s-int/lit16 v%d,v%d,#+0x%04x", \
(_opname), vdst, vsrc1, vsrc2); \
if (_chkdiv != 0) { \
s4 firstVal, result; \
firstVal = GET_REGISTER(vsrc1); \
if ((s2) vsrc2 == 0) { \
EXPORT_PC(); \
dvmThrowException("Ljava/lang/ArithmeticException;", \
"divide by zero"); \
GOTO_exceptionThrown(); \
} \
if ((u4)firstVal == 0x80000000 && ((s2) vsrc2) == -1) { \
/* won't generate /lit16 instr for this; check anyway */ \
if (_chkdiv == 1) \
result = firstVal; /* division */ \
else \
result = 0; /* remainder */ \
} else { \
result = firstVal _op (s2) vsrc2; \
} \
SET_REGISTER(vdst, result); \
} else { \
/* non-div/rem case */ \
SET_REGISTER(vdst, GET_REGISTER(vsrc1) _op (s2) vsrc2); \
} \
FINISH(2);
#define HANDLE_OP_X_INT_LIT8(_opcode, _opname, _op, _chkdiv) \
HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \
{ \
u2 litInfo; \
vdst = INST_AA(inst); \
litInfo = FETCH(1); \
vsrc1 = litInfo & 0xff; \
vsrc2 = litInfo >> 8; /* constant */ \
ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \
(_opname), vdst, vsrc1, vsrc2); \
if (_chkdiv != 0) { \
s4 firstVal, result; \
firstVal = GET_REGISTER(vsrc1); \
if ((s1) vsrc2 == 0) { \
EXPORT_PC(); \
dvmThrowException("Ljava/lang/ArithmeticException;", \
"divide by zero"); \
GOTO_exceptionThrown(); \
} \
if ((u4)firstVal == 0x80000000 && ((s1) vsrc2) == -1) { \
if (_chkdiv == 1) \
result = firstVal; /* division */ \
else \
result = 0; /* remainder */ \
} else { \
result = firstVal _op ((s1) vsrc2); \
} \
SET_REGISTER(vdst, result); \
} else { \
SET_REGISTER(vdst, \
(s4) GET_REGISTER(vsrc1) _op (s1) vsrc2); \
} \
} \
FINISH(2);
#define HANDLE_OP_SHX_INT_LIT8(_opcode, _opname, _cast, _op) \
HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \
{ \
u2 litInfo; \
vdst = INST_AA(inst); \
litInfo = FETCH(1); \
vsrc1 = litInfo & 0xff; \
vsrc2 = litInfo >> 8; /* constant */ \
ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \
(_opname), vdst, vsrc1, vsrc2); \
SET_REGISTER(vdst, \
_cast GET_REGISTER(vsrc1) _op (vsrc2 & 0x1f)); \
} \
FINISH(2);
#define HANDLE_OP_X_INT_2ADDR(_opcode, _opname, _op, _chkdiv) \
HANDLE_OPCODE(_opcode /*vA, vB*/) \
vdst = INST_A(inst); \
vsrc1 = INST_B(inst); \
ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \
if (_chkdiv != 0) { \
s4 firstVal, secondVal, result; \
firstVal = GET_REGISTER(vdst); \
secondVal = GET_REGISTER(vsrc1); \
if (secondVal == 0) { \
EXPORT_PC(); \
dvmThrowException("Ljava/lang/ArithmeticException;", \
"divide by zero"); \
GOTO_exceptionThrown(); \
} \
if ((u4)firstVal == 0x80000000 && secondVal == -1) { \
if (_chkdiv == 1) \
result = firstVal; /* division */ \
else \
result = 0; /* remainder */ \
} else { \
result = firstVal _op secondVal; \
} \
SET_REGISTER(vdst, result); \
} else { \
SET_REGISTER(vdst, \
(s4) GET_REGISTER(vdst) _op (s4) GET_REGISTER(vsrc1)); \
} \
FINISH(1);
#define HANDLE_OP_SHX_INT_2ADDR(_opcode, _opname, _cast, _op) \
HANDLE_OPCODE(_opcode /*vA, vB*/) \
vdst = INST_A(inst); \
vsrc1 = INST_B(inst); \
ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \
SET_REGISTER(vdst, \
_cast GET_REGISTER(vdst) _op (GET_REGISTER(vsrc1) & 0x1f)); \
FINISH(1);
#define HANDLE_OP_X_LONG(_opcode, _opname, _op, _chkdiv) \
HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
{ \
u2 srcRegs; \
vdst = INST_AA(inst); \
srcRegs = FETCH(1); \
vsrc1 = srcRegs & 0xff; \
vsrc2 = srcRegs >> 8; \
ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
if (_chkdiv != 0) { \
s8 firstVal, secondVal, result; \
firstVal = GET_REGISTER_WIDE(vsrc1); \
secondVal = GET_REGISTER_WIDE(vsrc2); \
if (secondVal == 0LL) { \
EXPORT_PC(); \
dvmThrowException("Ljava/lang/ArithmeticException;", \
"divide by zero"); \
GOTO_exceptionThrown(); \
} \
if ((u8)firstVal == 0x8000000000000000ULL && \
secondVal == -1LL) \
{ \
if (_chkdiv == 1) \
result = firstVal; /* division */ \
else \
result = 0; /* remainder */ \
} else { \
result = firstVal _op secondVal; \
} \
SET_REGISTER_WIDE(vdst, result); \
} else { \
SET_REGISTER_WIDE(vdst, \
(s8) GET_REGISTER_WIDE(vsrc1) _op (s8) GET_REGISTER_WIDE(vsrc2)); \
} \
} \
FINISH(2);
#define HANDLE_OP_SHX_LONG(_opcode, _opname, _cast, _op) \
HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
{ \
u2 srcRegs; \
vdst = INST_AA(inst); \
srcRegs = FETCH(1); \
vsrc1 = srcRegs & 0xff; \
vsrc2 = srcRegs >> 8; \
ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
SET_REGISTER_WIDE(vdst, \
_cast GET_REGISTER_WIDE(vsrc1) _op (GET_REGISTER(vsrc2) & 0x3f)); \
} \
FINISH(2);
#define HANDLE_OP_X_LONG_2ADDR(_opcode, _opname, _op, _chkdiv) \
HANDLE_OPCODE(_opcode /*vA, vB*/) \
vdst = INST_A(inst); \
vsrc1 = INST_B(inst); \
ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \
if (_chkdiv != 0) { \
s8 firstVal, secondVal, result; \
firstVal = GET_REGISTER_WIDE(vdst); \
secondVal = GET_REGISTER_WIDE(vsrc1); \
if (secondVal == 0LL) { \
EXPORT_PC(); \
dvmThrowException("Ljava/lang/ArithmeticException;", \
"divide by zero"); \
GOTO_exceptionThrown(); \
} \
if ((u8)firstVal == 0x8000000000000000ULL && \
secondVal == -1LL) \
{ \
if (_chkdiv == 1) \
result = firstVal; /* division */ \
else \
result = 0; /* remainder */ \
} else { \
result = firstVal _op secondVal; \
} \
SET_REGISTER_WIDE(vdst, result); \
} else { \
SET_REGISTER_WIDE(vdst, \
(s8) GET_REGISTER_WIDE(vdst) _op (s8)GET_REGISTER_WIDE(vsrc1));\
} \
FINISH(1);
#define HANDLE_OP_SHX_LONG_2ADDR(_opcode, _opname, _cast, _op) \
HANDLE_OPCODE(_opcode /*vA, vB*/) \
vdst = INST_A(inst); \
vsrc1 = INST_B(inst); \
ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \
SET_REGISTER_WIDE(vdst, \
_cast GET_REGISTER_WIDE(vdst) _op (GET_REGISTER(vsrc1) & 0x3f)); \
FINISH(1);
#define HANDLE_OP_X_FLOAT(_opcode, _opname, _op) \
HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
{ \
u2 srcRegs; \
vdst = INST_AA(inst); \
srcRegs = FETCH(1); \
vsrc1 = srcRegs & 0xff; \
vsrc2 = srcRegs >> 8; \
ILOGV("|%s-float v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
SET_REGISTER_FLOAT(vdst, \
GET_REGISTER_FLOAT(vsrc1) _op GET_REGISTER_FLOAT(vsrc2)); \
} \
FINISH(2);
#define HANDLE_OP_X_DOUBLE(_opcode, _opname, _op) \
HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
{ \
u2 srcRegs; \
vdst = INST_AA(inst); \
srcRegs = FETCH(1); \
vsrc1 = srcRegs & 0xff; \
vsrc2 = srcRegs >> 8; \
ILOGV("|%s-double v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
SET_REGISTER_DOUBLE(vdst, \
GET_REGISTER_DOUBLE(vsrc1) _op GET_REGISTER_DOUBLE(vsrc2)); \
} \
FINISH(2);
#define HANDLE_OP_X_FLOAT_2ADDR(_opcode, _opname, _op) \
HANDLE_OPCODE(_opcode /*vA, vB*/) \
vdst = INST_A(inst); \
vsrc1 = INST_B(inst); \
ILOGV("|%s-float-2addr v%d,v%d", (_opname), vdst, vsrc1); \
SET_REGISTER_FLOAT(vdst, \
GET_REGISTER_FLOAT(vdst) _op GET_REGISTER_FLOAT(vsrc1)); \
FINISH(1);
#define HANDLE_OP_X_DOUBLE_2ADDR(_opcode, _opname, _op) \
HANDLE_OPCODE(_opcode /*vA, vB*/) \
vdst = INST_A(inst); \
vsrc1 = INST_B(inst); \
ILOGV("|%s-double-2addr v%d,v%d", (_opname), vdst, vsrc1); \
SET_REGISTER_DOUBLE(vdst, \
GET_REGISTER_DOUBLE(vdst) _op GET_REGISTER_DOUBLE(vsrc1)); \
FINISH(1);
#define HANDLE_OP_AGET(_opcode, _opname, _type, _regsize) \
HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
{ \
ArrayObject* arrayObj; \
u2 arrayInfo; \
EXPORT_PC(); \
vdst = INST_AA(inst); \
arrayInfo = FETCH(1); \
vsrc1 = arrayInfo & 0xff; /* array ptr */ \
vsrc2 = arrayInfo >> 8; /* index */ \
ILOGV("|aget%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \
if (!checkForNull((Object*) arrayObj)) \
GOTO_exceptionThrown(); \
if (GET_REGISTER(vsrc2) >= arrayObj->length) { \
LOGV("Invalid array access: %p %d (len=%d)\n", \
arrayObj, vsrc2, arrayObj->length); \
dvmThrowException("Ljava/lang/ArrayIndexOutOfBoundsException;", \
NULL); \
GOTO_exceptionThrown(); \
} \
SET_REGISTER##_regsize(vdst, \
((_type*) arrayObj->contents)[GET_REGISTER(vsrc2)]); \
ILOGV("+ AGET[%d]=0x%x", GET_REGISTER(vsrc2), GET_REGISTER(vdst)); \
} \
FINISH(2);
#define HANDLE_OP_APUT(_opcode, _opname, _type, _regsize) \
HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
{ \
ArrayObject* arrayObj; \
u2 arrayInfo; \
EXPORT_PC(); \
vdst = INST_AA(inst); /* AA: source value */ \
arrayInfo = FETCH(1); \
vsrc1 = arrayInfo & 0xff; /* BB: array ptr */ \
vsrc2 = arrayInfo >> 8; /* CC: index */ \
ILOGV("|aput%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \
if (!checkForNull((Object*) arrayObj)) \
GOTO_exceptionThrown(); \
if (GET_REGISTER(vsrc2) >= arrayObj->length) { \
dvmThrowException("Ljava/lang/ArrayIndexOutOfBoundsException;", \
NULL); \
GOTO_exceptionThrown(); \
} \
ILOGV("+ APUT[%d]=0x%08x", GET_REGISTER(vsrc2), GET_REGISTER(vdst));\
((_type*) arrayObj->contents)[GET_REGISTER(vsrc2)] = \
GET_REGISTER##_regsize(vdst); \
} \
FINISH(2);
/*
* It's possible to get a bad value out of a field with sub-32-bit stores
* because the -quick versions always operate on 32 bits. Consider:
* short foo = -1 (sets a 32-bit register to 0xffffffff)
* iput-quick foo (writes all 32 bits to the field)
* short bar = 1 (sets a 32-bit register to 0x00000001)
* iput-short (writes the low 16 bits to the field)
* iget-quick foo (reads all 32 bits from the field, yielding 0xffff0001)
* This can only happen when optimized and non-optimized code has interleaved
* access to the same field. This is unlikely but possible.
*
* The easiest way to fix this is to always read/write 32 bits at a time. On
* a device with a 16-bit data bus this is sub-optimal. (The alternative
* approach is to have sub-int versions of iget-quick, but now we're wasting
* Dalvik instruction space and making it less likely that handler code will
* already be in the CPU i-cache.)
*/
#define HANDLE_IGET_X(_opcode, _opname, _ftype, _regsize) \
HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
{ \
InstField* ifield; \
Object* obj; \
EXPORT_PC(); \
vdst = INST_A(inst); \
vsrc1 = INST_B(inst); /* object ptr */ \
ref = FETCH(1); /* field ref */ \
ILOGV("|iget%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \
obj = (Object*) GET_REGISTER(vsrc1); \
if (!checkForNull(obj)) \
GOTO_exceptionThrown(); \
ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
if (ifield == NULL) { \
ifield = dvmResolveInstField(curMethod->clazz, ref); \
if (ifield == NULL) \
GOTO_exceptionThrown(); \
} \
SET_REGISTER##_regsize(vdst, \
dvmGetField##_ftype(obj, ifield->byteOffset)); \
ILOGV("+ IGET '%s'=0x%08llx", ifield->field.name, \
(u8) GET_REGISTER##_regsize(vdst)); \
UPDATE_FIELD_GET(&ifield->field); \
} \
FINISH(2);
#define HANDLE_IGET_X_QUICK(_opcode, _opname, _ftype, _regsize) \
HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
{ \
Object* obj; \
vdst = INST_A(inst); \
vsrc1 = INST_B(inst); /* object ptr */ \
ref = FETCH(1); /* field offset */ \
ILOGV("|iget%s-quick v%d,v%d,field@+%u", \
(_opname), vdst, vsrc1, ref); \
obj = (Object*) GET_REGISTER(vsrc1); \
if (!checkForNullExportPC(obj, fp, pc)) \
GOTO_exceptionThrown(); \
SET_REGISTER##_regsize(vdst, dvmGetField##_ftype(obj, ref)); \
ILOGV("+ IGETQ %d=0x%08llx", ref, \
(u8) GET_REGISTER##_regsize(vdst)); \
} \
FINISH(2);
#define HANDLE_IPUT_X(_opcode, _opname, _ftype, _regsize) \
HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
{ \
InstField* ifield; \
Object* obj; \
EXPORT_PC(); \
vdst = INST_A(inst); \
vsrc1 = INST_B(inst); /* object ptr */ \
ref = FETCH(1); /* field ref */ \
ILOGV("|iput%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \
obj = (Object*) GET_REGISTER(vsrc1); \
if (!checkForNull(obj)) \
GOTO_exceptionThrown(); \
ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
if (ifield == NULL) { \
ifield = dvmResolveInstField(curMethod->clazz, ref); \
if (ifield == NULL) \
GOTO_exceptionThrown(); \
} \
dvmSetField##_ftype(obj, ifield->byteOffset, \
GET_REGISTER##_regsize(vdst)); \
ILOGV("+ IPUT '%s'=0x%08llx", ifield->field.name, \
(u8) GET_REGISTER##_regsize(vdst)); \
UPDATE_FIELD_PUT(&ifield->field); \
} \
FINISH(2);
#define HANDLE_IPUT_X_QUICK(_opcode, _opname, _ftype, _regsize) \
HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
{ \
Object* obj; \
vdst = INST_A(inst); \
vsrc1 = INST_B(inst); /* object ptr */ \
ref = FETCH(1); /* field offset */ \
ILOGV("|iput%s-quick v%d,v%d,field@0x%04x", \
(_opname), vdst, vsrc1, ref); \
obj = (Object*) GET_REGISTER(vsrc1); \
if (!checkForNullExportPC(obj, fp, pc)) \
GOTO_exceptionThrown(); \
dvmSetField##_ftype(obj, ref, GET_REGISTER##_regsize(vdst)); \
ILOGV("+ IPUTQ %d=0x%08llx", ref, \
(u8) GET_REGISTER##_regsize(vdst)); \
} \
FINISH(2);
#define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \
HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
{ \
StaticField* sfield; \
vdst = INST_AA(inst); \
ref = FETCH(1); /* field ref */ \
ILOGV("|sget%s v%d,sfield@0x%04x", (_opname), vdst, ref); \
sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
if (sfield == NULL) { \
EXPORT_PC(); \
sfield = dvmResolveStaticField(curMethod->clazz, ref); \
if (sfield == NULL) \
GOTO_exceptionThrown(); \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
ILOGV("+ SGET '%s'=0x%08llx", \
sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
UPDATE_FIELD_GET(&sfield->field); \
} \
FINISH(2);
#define HANDLE_SPUT_X(_opcode, _opname, _ftype, _regsize) \
HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
{ \
StaticField* sfield; \
vdst = INST_AA(inst); \
ref = FETCH(1); /* field ref */ \
ILOGV("|sput%s v%d,sfield@0x%04x", (_opname), vdst, ref); \
sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
if (sfield == NULL) { \
EXPORT_PC(); \
sfield = dvmResolveStaticField(curMethod->clazz, ref); \
if (sfield == NULL) \
GOTO_exceptionThrown(); \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
ILOGV("+ SPUT '%s'=0x%08llx", \
sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
UPDATE_FIELD_PUT(&sfield->field); \
} \
FINISH(2);
/* File: cstubs/enddefs.c */
/* undefine "magic" name remapping */
#undef retval
#undef pc
#undef fp
#undef curMethod
#undef methodClassDex
#undef self
#undef debugTrackedRefStart
/* File: armv5te/debug.c */
#include <inttypes.h>
/*
* Dump the fixed-purpose ARM registers, along with some other info.
*
* This function MUST be compiled in ARM mode -- THUMB will yield bogus
* results.
*
* This will NOT preserve r0-r3/ip.
*/
void dvmMterpDumpArmRegs(uint32_t r0, uint32_t r1, uint32_t r2, uint32_t r3)
{
register uint32_t rPC asm("r4");
register uint32_t rFP asm("r5");
register uint32_t rGLUE asm("r6");
register uint32_t rIBASE asm("r7");
register uint32_t rINST asm("r8");
register uint32_t r9 asm("r9");
register uint32_t r10 asm("r10");
extern char dvmAsmInstructionStart[];
printf("REGS: r0=%08x r1=%08x r2=%08x r3=%08x\n", r0, r1, r2, r3);
printf(" : rPC=%08x rFP=%08x rGLUE=%08x rIBASE=%08x\n",
rPC, rFP, rGLUE, rIBASE);
printf(" : rINST=%08x r9=%08x r10=%08x\n", rINST, r9, r10);
MterpGlue* glue = (MterpGlue*) rGLUE;
const Method* method = glue->method;
printf(" + self is %p\n", dvmThreadSelf());
//printf(" + currently in %s.%s %s\n",
// method->clazz->descriptor, method->name, method->signature);
//printf(" + dvmAsmInstructionStart = %p\n", dvmAsmInstructionStart);
//printf(" + next handler for 0x%02x = %p\n",
// rINST & 0xff, dvmAsmInstructionStart + (rINST & 0xff) * 64);
}
/*
* Dump the StackSaveArea for the specified frame pointer.
*/
void dvmDumpFp(void* fp, StackSaveArea* otherSaveArea)
{
StackSaveArea* saveArea = SAVEAREA_FROM_FP(fp);
printf("StackSaveArea for fp %p [%p/%p]:\n", fp, saveArea, otherSaveArea);
#ifdef EASY_GDB
printf(" prevSave=%p, prevFrame=%p savedPc=%p meth=%p curPc=%p\n",
saveArea->prevSave, saveArea->prevFrame, saveArea->savedPc,
saveArea->method, saveArea->xtra.currentPc);
#else
printf(" prevFrame=%p savedPc=%p meth=%p curPc=%p fp[0]=0x%08x\n",
saveArea->prevFrame, saveArea->savedPc,
saveArea->method, saveArea->xtra.currentPc,
*(u4*)fp);
#endif
}
/*
* Does the bulk of the work for common_printMethod().
*/
void dvmMterpPrintMethod(Method* method)
{
/*
* It is a direct (non-virtual) method if it is static, private,
* or a constructor.
*/
bool isDirect =
((method->accessFlags & (ACC_STATIC|ACC_PRIVATE)) != 0) ||
(method->name[0] == '<');
char* desc = dexProtoCopyMethodDescriptor(&method->prototype);
printf("<%c:%s.%s %s> ",
isDirect ? 'D' : 'V',
method->clazz->descriptor,
method->name,
desc);
free(desc);
}