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<title>binop/2addr</title>
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<h1>binop/2addr</h1>
<h2>Purpose</h2>
<p>
Perform the identified binary operation on the two source registers, storing the
result in the first source register.
</p>
<h2>Details</h2>
<table class="instruc">
<thead>
<tr>
<th>Op & Format</th>
<th>Mnemonic / Syntax</th>
<th>Arguments</th>
</tr>
</thead>
<tbody>
<tr>
<td>b0..cf 12x</td>
<td><i>binop</i>/2addr vA, vB<br/>
b0: add-int/2addr<br/>
b1: sub-int/2addr<br/>
b2: mul-int/2addr<br/>
b3: div-int/2addr<br/>
b4: rem-int/2addr<br/>
b5: and-int/2addr<br/>
b6: or-int/2addr<br/>
b7: xor-int/2addr<br/>
b8: shl-int/2addr<br/>
b9: shr-int/2addr<br/>
ba: ushr-int/2addr<br/>
bb: add-long/2addr<br/>
bc: sub-long/2addr<br/>
bd: mul-long/2addr<br/>
be: div-long/2addr<br/>
bf: rem-long/2addr<br/>
c0: and-long/2addr<br/>
c1: or-long/2addr<br/>
c2: xor-long/2addr<br/>
c3: shl-long/2addr<br/>
c4: shr-long/2addr<br/>
c5: ushr-long/2addr<br/>
c6: add-float/2addr<br/>
c7: sub-float/2addr<br/>
c8: mul-float/2addr<br/>
c9: div-float/2addr<br/>
ca: rem-float/2addr<br/>
cb: add-double/2addr<br/>
cc: sub-double/2addr<br/>
cd: mul-double/2addr<br/>
ce: div-double/2addr<br/>
cf: rem-double/2addr
</td>
<td><code>A:</code> destination and first source register or pair
(4 bits)<br/>
<code>B:</code> second source register or pair (4 bits)</td>
</tr>
</tbody>
</table>
<h2>Constraints</h2>
<ul>
<li>
Both A and B must be valid register indices in the current stackframe.
</li>
<li>
For the -long and -double variants, also A+1 and B+1 must be valid register
indices.
</li>
<li>
Registers vA and vB must be defined. They must both contain values that
match the variant of the instruction (it's probably better to split this up
into multiple pages again).
</li>
</ul>
<h2>Behavior</h2>
<ul>
<li>
The given operation <binop> is performed according to the semantics
specified in table XXX.
</li>
<li>
The result is stored in register vA, that is, vA'=vA <binop> vB.
</li>
<li>
For the -double and -long variants, (vA+1) is also affected.
</li>
<li>
As usual, neighboring registers might get undefined, if vA (and vA+1) were
part of a register pair originally.
</li>
</ul>
<h2>Exceptions</h2>
<ul>
<li>
ArithmeticException if an error occurs during the instruction.
</li>
</ul>
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