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<title>move-result-wide</title>
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<h1>move-result-wide</h1>

<h2>Purpose</h2>

<p>
Move the double-word result of the most recent invoke-kind into the indicated
register pair. This must be done as the instruction immediately after an
invoke-kind whose (double-word) result is not to be ignored; anywhere else is
invalid.
</p>

<h2>Details</h2>

<table class="instruc">
<thead>
<tr>
  <th>Op &amp; Format</th>
  <th>Mnemonic / Syntax</th>
  <th>Arguments</th>
</tr>
</thead>
<tbody>
<tr>
  <td>0b 11x</td>
  <td>move-result-wide vAA</td>
  <td><code>A:</code> destination register pair (8 bits)</td>
</tr>
</tbody>
</table>

<h2>Constraints</h2>

<ul>
  <li>
    A+1 must be a valid register index in the current stack frame (which
    includes A itself being valid).
  </li>
  <li>
    The instruction must be immediately preceded (in the code array) by an
    invoke-kind instruction.
  </li>
  <li>
    The instruction must be immediately reached (in the actual control flow)
    through returning from this invoke-kind instruction (it must not be jumped
    to).
  </li>
  <li>
    The result delivered by the invoke-kind instruction must be either a long
    or a double value.
  </li>
</ul>

<h2>Behavior</h2>

<ul>
  <li>
    The upper 32 bits of the result delivered by the invoke-kind instruction are
    moved to register vA, that is, vA' = result >> 0x20.
  </li>
  <li>
    The lower 32 bits of the result delivered by the invoke-kind instruction are
    moved to register v(A+1), that is, v(A+1)' = result & 0xffffffff.
  </li>
  <li>
    If register v(A-1) is the lower half of a register pair, register v(A-1)'
    becomes undefined.
  </li>
  <li>
    If register v(A+2) is the upper half of a register pair, register v(A+2)'
    becomes undefined.
  </li>
</ul>

<h2>Exceptions</h2>

<p>
None.
</p>

<h2>Notes</h2>

<p>
This instruction can also be thought of as reading the contents of a special
"result" register that is made valid and defined by executing a non-void return
instruction or a filled-new-array instruction. The execution of any other
instruction (including this one) renders this special register invalid.
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