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// Copyright 2015, ARM Limited
// All rights reserved.
//
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// modification, are permitted provided that the following conditions are met:
//
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//     this list of conditions and the following disclaimer.
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// ---------------------------------------------------------------------
// This file is auto generated using tools/generate_simulator_traces.py.
//
// PLEASE DO NOT EDIT.
// ---------------------------------------------------------------------

#ifndef VIXL_SIM_NOT__8B_TRACE_A64_H_
#define VIXL_SIM_NOT__8B_TRACE_A64_H_

const uint8_t kExpected_NEON_not__8B[] = {
  0xcc, 0xaa, 0x82, 0x81, 0x80, 0x7f, 0x7e, 0x7d,
  0xaa, 0x82, 0x81, 0x80, 0x7f, 0x7e, 0x7d, 0x7c,
  0x82, 0x81, 0x80, 0x7f, 0x7e, 0x7d, 0x7c, 0x55,
  0x81, 0x80, 0x7f, 0x7e, 0x7d, 0x7c, 0x55, 0x33,
  0x80, 0x7f, 0x7e, 0x7d, 0x7c, 0x55, 0x33, 0x07,
  0x7f, 0x7e, 0x7d, 0x7c, 0x55, 0x33, 0x07, 0x02,
  0x7e, 0x7d, 0x7c, 0x55, 0x33, 0x07, 0x02, 0x01,
  0x7d, 0x7c, 0x55, 0x33, 0x07, 0x02, 0x01, 0x00,
  0x7c, 0x55, 0x33, 0x07, 0x02, 0x01, 0x00, 0xff,
  0x55, 0x33, 0x07, 0x02, 0x01, 0x00, 0xff, 0xfe,
  0x33, 0x07, 0x02, 0x01, 0x00, 0xff, 0xfe, 0xfd,
  0x07, 0x02, 0x01, 0x00, 0xff, 0xfe, 0xfd, 0xf7,
  0x02, 0x01, 0x00, 0xff, 0xfe, 0xfd, 0xf7, 0xcc,
  0x01, 0x00, 0xff, 0xfe, 0xfd, 0xf7, 0xcc, 0xaa,
  0x00, 0xff, 0xfe, 0xfd, 0xf7, 0xcc, 0xaa, 0x82,
  0xff, 0xfe, 0xfd, 0xf7, 0xcc, 0xaa, 0x82, 0x81,
  0xfe, 0xfd, 0xf7, 0xcc, 0xaa, 0x82, 0x81, 0x80,
  0xfd, 0xf7, 0xcc, 0xaa, 0x82, 0x81, 0x80, 0x7f,
  0xf7, 0xcc, 0xaa, 0x82, 0x81, 0x80, 0x7f, 0x7e,
};
const unsigned kExpectedCount_NEON_not__8B = 19;

#endif  // VIXL_SIM_NOT__8B_TRACE_A64_H_