// Copyright 2015, ARM Limited
// All rights reserved.
//
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// modification, are permitted provided that the following conditions are met:
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// this list of conditions and the following disclaimer in the documentation
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// ---------------------------------------------------------------------
// This file is auto generated using tools/generate_simulator_traces.py.
//
// PLEASE DO NOT EDIT.
// ---------------------------------------------------------------------
#ifndef VIXL_SIM_SHLL2_4S_2OPIMM_TRACE_A64_H_
#define VIXL_SIM_SHLL2_4S_2OPIMM_TRACE_A64_H_
const uint32_t kExpected_NEON_shll2_4S_2OPIMM[] = {
0xfffd0000, 0xfffe0000, 0xffff0000, 0x00000000,
0xfffe0000, 0xffff0000, 0x00000000, 0x00010000,
0xffff0000, 0x00000000, 0x00010000, 0x00020000,
0x00000000, 0x00010000, 0x00020000, 0x00100000,
0x00010000, 0x00020000, 0x00100000, 0x007d0000,
0x00020000, 0x00100000, 0x007d0000, 0x007e0000,
0x00100000, 0x007d0000, 0x007e0000, 0x007f0000,
0x007d0000, 0x007e0000, 0x007f0000, 0x33330000,
0x007e0000, 0x007f0000, 0x33330000, 0x55550000,
0x007f0000, 0x33330000, 0x55550000, 0x7ffd0000,
0x33330000, 0x55550000, 0x7ffd0000, 0x7ffe0000,
0x55550000, 0x7ffd0000, 0x7ffe0000, 0x7fff0000,
0x7ffd0000, 0x7ffe0000, 0x7fff0000, 0x80000000,
0x7ffe0000, 0x7fff0000, 0x80000000, 0x80010000,
0x7fff0000, 0x80000000, 0x80010000, 0xaaaa0000,
0x80000000, 0x80010000, 0xaaaa0000, 0xcccc0000,
0x80010000, 0xaaaa0000, 0xcccc0000, 0xff800000,
0xaaaa0000, 0xcccc0000, 0xff800000, 0xff810000,
0xcccc0000, 0xff800000, 0xff810000, 0xff820000,
0xff800000, 0xff810000, 0xff820000, 0xff830000,
0xff810000, 0xff820000, 0xff830000, 0xfff00000,
0xff820000, 0xff830000, 0xfff00000, 0xfffd0000,
0xff830000, 0xfff00000, 0xfffd0000, 0xfffe0000,
0xfff00000, 0xfffd0000, 0xfffe0000, 0xffff0000,
};
const unsigned kExpectedCount_NEON_shll2_4S_2OPIMM = 24;
#endif // VIXL_SIM_SHLL2_4S_2OPIMM_TRACE_A64_H_