// Copyright 2015, VIXL authors
// All rights reserved.
//
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// modification, are permitted provided that the following conditions are met:
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// * Redistributions in binary form must reproduce the above copyright notice,
// this list of conditions and the following disclaimer in the documentation
// and/or other materials provided with the distribution.
// * Neither the name of ARM Limited nor the names of its contributors may be
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// ---------------------------------------------------------------------
// This file is auto generated using tools/generate_simulator_traces.py.
//
// PLEASE DO NOT EDIT.
// ---------------------------------------------------------------------
#ifndef VIXL_SIM_SUQADD_4H_TRACE_AARCH64_H_
#define VIXL_SIM_SUQADD_4H_TRACE_AARCH64_H_
const uint16_t kExpected_NEON_suqadd_4H[] = {
0x7fff, 0x7fff, 0x7fff, 0x7fff,
0x7fff, 0x7fff, 0x7fff, 0x7fff,
0x7fff, 0x7fff, 0x7fff, 0x7fff,
0x7fff, 0x7fff, 0x7fff, 0x7fff,
0x7fff, 0x7fff, 0x7fff, 0x0000,
0x7fff, 0x7fff, 0x0000, 0x0001,
0x7fff, 0x0000, 0x0001, 0x0002,
0x0000, 0x0001, 0x0002, 0x0010,
0x0001, 0x0002, 0x0010, 0x007d,
0x0002, 0x0010, 0x007d, 0x007e,
0x0010, 0x007d, 0x007e, 0x007f,
0x007d, 0x007e, 0x007f, 0x3333,
0x007e, 0x007f, 0x3333, 0x5555,
0x007f, 0x3333, 0x5555, 0x7ffd,
0x3333, 0x5555, 0x7ffd, 0x7ffe,
0x5555, 0x7ffd, 0x7ffe, 0x7fff,
0x7ffd, 0x7ffe, 0x7fff, 0x7fff,
0x7ffe, 0x7fff, 0x7fff, 0x7fff,
0x7fff, 0x7fff, 0x7fff, 0x7fff,
0x7fff, 0x7fff, 0x7fff, 0x7fff,
0x7fff, 0x7fff, 0x7fff, 0x7fff,
0x7fff, 0x7fff, 0x7fff, 0x7fff,
0x7fff, 0x7fff, 0x7fff, 0x7fff,
0x7fff, 0x7fff, 0x7fff, 0x7fff,
};
const unsigned kExpectedCount_NEON_suqadd_4H = 24;
#endif // VIXL_SIM_SUQADD_4H_TRACE_AARCH64_H_