Kernel  |  3.10

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* Freescale Enhanced Secure Digital Host Controller (eSDHC)

The Enhanced Secure Digital Host Controller provides an interface
for MMC, SD, and SDIO types of memory cards.

This file documents differences between the core properties described
by mmc.txt and the properties used by the sdhci-esdhc driver.

Required properties:
  - interrupt-parent : interrupt source phandle.
  - clock-frequency : specifies eSDHC base clock frequency.

Optional properties:
  - sdhci,wp-inverted : specifies that eSDHC controller reports
    inverted write-protect state; New devices should use the generic
    "wp-inverted" property.
  - sdhci,1-bit-only : specifies that a controller can only handle
    1-bit data transfers. New devices should use the generic
    "bus-width = <1>" property.
  - sdhci,auto-cmd12: specifies that a controller can only handle auto
    CMD12.

Example:

sdhci@2e000 {
	compatible = "fsl,mpc8378-esdhc", "fsl,esdhc";
	reg = <0x2e000 0x1000>;
	interrupts = <42 0x8>;
	interrupt-parent = <&ipic>;
	/* Filled in by U-Boot */
	clock-frequency = <0>;
};