#include <dt-bindings/interrupt-controller/arm-gic.h> #include "skeleton.dtsi" / { #address-cells = <2>; #size-cells = <2>; model = "Broadcom STB (bcm7445)"; compatible = "brcm,bcm7445", "brcm,brcmstb"; interrupt-parent = <&gic>; chosen { bootargs = "console=ttyS0,115200 earlyprintk"; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { compatible = "brcm,brahma-b15"; device_type = "cpu"; enable-method = "brcm,brahma-b15"; reg = <0>; }; cpu@1 { compatible = "brcm,brahma-b15"; device_type = "cpu"; enable-method = "brcm,brahma-b15"; reg = <1>; }; cpu@2 { compatible = "brcm,brahma-b15"; device_type = "cpu"; enable-method = "brcm,brahma-b15"; reg = <2>; }; cpu@3 { compatible = "brcm,brahma-b15"; device_type = "cpu"; enable-method = "brcm,brahma-b15"; reg = <3>; }; }; gic: interrupt-controller@ffd00000 { compatible = "brcm,brahma-b15-gic", "arm,cortex-a15-gic"; reg = <0x00 0xffd01000 0x00 0x1000>, <0x00 0xffd02000 0x00 0x2000>, <0x00 0xffd04000 0x00 0x2000>, <0x00 0xffd06000 0x00 0x2000>; interrupt-controller; #interrupt-cells = <3>; }; timer { compatible = "arm,armv7-timer"; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 14 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 11 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 10 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>; }; rdb { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; ranges = <0 0x00 0xf0000000 0x1000000>; serial@40ab00 { compatible = "ns16550a"; reg = <0x40ab00 0x20>; reg-shift = <2>; reg-io-width = <4>; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; clock-frequency = <81000000>; }; sun_top_ctrl: syscon@404000 { compatible = "brcm,bcm7445-sun-top-ctrl", "syscon"; reg = <0x404000 0x51c>; }; hif_cpubiuctrl: syscon@3e2400 { compatible = "brcm,bcm7445-hif-cpubiuctrl", "syscon"; reg = <0x3e2400 0x5b4>; }; hif_continuation: syscon@452000 { compatible = "brcm,bcm7445-hif-continuation", "syscon"; reg = <0x452000 0x100>; }; irq0_intc: interrupt-controller@40a780 { compatible = "brcm,bcm7120-l2-intc"; interrupt-parent = <&gic>; #interrupt-cells = <1>; reg = <0x40a780 0x8>; interrupt-controller; interrupts = <GIC_SPI 0x45 0x0>, <GIC_SPI 0x43 0x0>; brcm,int-map-mask = <0x25c>, <0x7000000>; brcm,int-fwd-mask = <0x70000>; }; }; smpboot { compatible = "brcm,brcmstb-smpboot"; syscon-cpu = <&hif_cpubiuctrl 0x88 0x178>; syscon-cont = <&hif_continuation>; }; reboot { compatible = "brcm,brcmstb-reboot"; syscon = <&sun_top_ctrl 0x304 0x308>; }; };